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— The paper presents experimental demonstration of 6-bit digital-to-analog (DAC) and 4-bit analog-to-digital conversion (ADC) operations implemented with a hybrid circuit consisting of Pt/TiO 2-x /Pt resistive switching devices (also known as ReRAMs or memristors) and a Si operational amplifier (op-amp). In particular, a binary-weighted implementation is(More)
— We have modified a commercial NOR flash memory array to enable high-precision tuning of individual floating-gate cells for analog computing applications. The modified array area per cell in a 180 nm process is about 1.5 μm 2. While this area is approximately twice the original cell size, it is still at least an order of magnitude smaller than in(More)
A total of 288 crossbred (Duroc×Landrace×Yorkshire) growing pigs were used in two experiments to investigate the effects of adding β-mannanase to corn-soybean meal-based diets on pig performance and apparent total tract digestibility (ATTD). Both experiments lasted 28 d and were split into two phases namely 1 to 14 days (phase 1) and 15 to 28 days (phase(More)
We have designed, fabricated, and successfully tested a prototype mixed-signal, 28×28-binary-input, 10-ouput, 3-layer neuromorphic network (" MLP perceptron "). It is based on embedded nonvolatile floating-gate cell arrays redesigned from a commercial 180-nm NOR flash memory. The arrays allow precise (~1%) individual tuning of all memory cells, having(More)
—We have fabricated and successfully tested an analog vector-by-matrix multiplier, based on redesigned 10×12 arrays of 55 nm commercial NOR flash memory cells. The modified arrays enable high-precision individual analog tuning of each cell, with sub-1% accuracy, while keeping the highly optimized cells, with their long-term state retention, intact. The(More)
The purpose of this work was to demonstrate the feasibility of building recurrent artificial neural networks with hybrid complementary metal oxide semiconductor (CMOS)/memristor circuits. To do so, we modeled a Hopfield network implementing an analog-to-digital converter (ADC) with up to 8 bits of precision. Major shortcomings affecting the ADC's precision,(More)
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