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Implementation of FPGA-based PSK demodulator
TLDR
An FPGA-based digital PSK demodulator can be used to demodulate various PSK modulated mode,with partial circuit structure changed rather than the whole,when chosen reasonable circuit structure and algorithms. Expand
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Decoder with Low Resource Overhead for Multi-edge Type LDPC Codes Based on Cache
TLDR
To study low cost and low power applications,we propose a decoding architecture with low resource overhead for multi-edge-type low density parity check(LDPC) codes. Expand