Xiaozong Huang

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A failure analysis of a product due to the on chip ESD structure defects is presented in this paper. ESD is one of the most important reliability issues in the design of integrated circuits. About 40% of the failure of integrated circuits is related to ESD/EOS stress. In order to improve the reliability of ICs, the design of ESD protection is increasingly(More)
A simple low power current sensor for DC-DC converters is presented in this paper. The proposed current sensor is designed without using amplifier. This greatly reduces the power consumption and significantly saves silicon area. Simulation shows less than 20uA total current consumption can be achieved by using this structure. The performance of this design(More)
Segmentation technique for optimizing the holding voltage of SCR is discussed and implemented in a 0.6μm SOI process. Based on the prior researches, the holding voltage of SCR is a key parameter for latch-up risk assessment. The segmented SCR with external resistor paralleled with the parasitic Ptub resistor is proposed by modifying the layout, and(More)
An ESD clamp protection structure with current mirror for capacitor boosting was proposed in this paper. For the power rail protection, silicon-control-rectifier (SCR) is a better choice than the BIGFET as main ESD clamp device, which can provide better ESD robustness with smaller area and lower leakage current. The area of protection structure is reduced(More)
This paper presents a novel scheme for IF digital software radio receiver application, which integrates a high performance A/D converter and high-speed digital down converter (DDC) block into a SoC (system on chip) based on 32-bit RISC CPU. The proposed design can transform intermediate frequency (IF) analog signal to baseband digital signal and realize the(More)
We propose a novel algorithm for inverse quantization in some audio codec systems, such as MP3, AAC, etc. The optimized algorithm not only reduces the memory size and increases the accuracy of coefficients, but also simplifies the calculations. Compared with other reported algorithms based on float-point calculation, the novel method significantly improved(More)
A closed-loop controlled interface IC on the principle of force-balance for differential-capacitive sensor system is presented in this work. Signal buffer immune for the parasitic capacitors is introduced to reduce the signal attenuation. A novel PID compensation block is designed to enhance the stability of the system with extremely high gain for accuracy,(More)
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