Xiaoyong Xue

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This paper proposes a quite accurate CMOS temperature sensor designed and developed for monitoring enviromental temperature. The sensor uses subthreshold MOSFET to measure temperature. The circuit has been implemented by IO thick-oxide MOS devices in 0.13um standard logic process and occupies a silicon area of 37&#x00D7;41um<sup>2</sup>. The performance of(More)
A 64Kb logic Resistive Random Access Memory (RRAM) test chip for encryption keys storage is presented for the first time. The excellent security features of resisting physical attacks and side-channel attacks are theoretically analyzed and experimentally proved. The chip is fabricated in 0.13μm standard logic process, and can directly integrate with(More)
Emerging nonvolatile memories (NVMs), such as MRAM, PRAM, and RRAM, have been widely investigated to replace SRAM as the configuration bits in field-programmable gate arrays (FPGAs) for high security and instant power ON. However, the variations inherent in NVMs and advanced logic process bring reliability issue to FPGAs. This brief introduces a low-power(More)
The Internet of Things(IoT) has become a popular technology, and various middleware has been proposed and developed for IoT systems. However, there have been few studies on the data management of IoT systems. In this paper, we consider graph database models for the data management of IoT systems because these models can specify relationships in a(More)
In this paper a SPICE model of bi-layer and bipolar metal oxide resistive random access memory (RRAM) is proposed. Stepped reset phenomenon in bipolar RRAM is included and the impact of buffer layer thickness on Ireset is reproduced. The model is verified by experimental results from AlOx/WOx based RRAM [1,2]. This model is useful for multi bits storage(More)