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Ontology based context modeling and reasoning using OWL
Here we propose an OWL encoded context ontology (CONON) for modeling context in pervasive computing environments, and for supporting logic-based context reasoning. CONON provides an upper contextExpand
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Semantic Space: an infrastructure for smart spaces
Semantic Space is a pervasive computing infrastructure that exploits semantic Web technologies to support explicit representation, expressive querying, and flexible reasoning of contexts in smartExpand
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Supporting Context-Aware Media Recommendations for Smart Phones
A context-aware media recommendation platform uses an NtimesM-dimensional model and a hybrid processing approach to support media recommendation, adaptation, and delivery for smart phones. To provideExpand
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Dynamic programming-based lifetime aware adaptive routing algorithm for Network-on-Chip
Technology scaling leads to the reliability issue as a primary concern in Network-on-Chip (NoC) design. Due to the routing algorithms, some routers may age much faster than others, which becomes aExpand
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Enhancing Semantic Spaces with Event-Driven Context Interpretation
One important functionality provided by a context-aware infrastructure is to derive high-level contexts on behalf of context-aware applications. High-level contexts are summary descriptions aboutExpand
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ABDTR: Approximation-Based Dynamic Traffic Regulation for Networks-on-Chip Systems
Traffic regulation is an essential technology of networks-on-chip (NoC) to achieve communication performance guarantees with effective use of the system interconnect and low traffic delay. This paperExpand
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DeFrag: Defragmentation for Efficient Runtime Resource Allocation in NoC-Based Many-core Systems
Efficient runtime resource allocation is critical to the overall performance and energy consumption of many-core systems. However, due to the applications' unknown arrival and departure time underExpand
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Bubble Budgeting: Throughput Optimization for Dynamic Workloads by Exploiting Dark Cores in Many Core Systems
All the cores of a many-core chip cannot be active at the same time, due to reasons like low CPU utilization in server systems and limited power budget in dark silicon era. These free cores (referredExpand
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High dimensional covariance matrix estimation by penalizing the matrix-logarithm transformed likelihood
It is well known that when the dimension of the data becomes very large, the sample covariance matrix S will not be a good estimator of the population covariance matrix Σ. Using such estimator, oneExpand
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A power-aware mapping approach to map IP cores onto NoCs under bandwidth and latency constraints
In this article, we investigate the Intellectual Property (IP) mapping problem that maps a given set of IP cores onto the tiles of a mesh-based Network-on-Chip (NoC) architecture such that the powerExpand
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