Xiangrong Cao

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Multi-core processors have become the main development trend of processor, because of their advantages of performance and power dissipation. The multi-core structure leads to many new features for on-chip memory system, such as much larger capacity of cache, more complex circuit for cache sharing management of different threads. The low power issue is still(More)
In this paper, based on word-serial pipeline architecture, a new efficient distributed arithmetic (NEDA) technique is introduced. This architecture increases the speed and reduced the time of 2-D discrete wavelet transform (DWT). In this design, word-serial pipeline architecture able to compute a complete 2-D discrete wavelet transforms (DWT) binary tree in(More)
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