Xia An

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It is predicted that CMOS technology will probably enter into 22 nm node around 2012. Scaling of CMOS logic technology from 32 to 22 nm node meets more critical issues and needs some significant changes of the technology, as well as integration of the advanced processes. This paper will review the key processing technologies which can be potentially(More)
In this paper, heavy-ion-induced permanent damage in fully depleted silicon-on-insulator (FD SOI) devices are investigated. After exposure to heavy ions, the characteristics degradation of FD SOI nMOSFET are presented, which is due to the microdose effect in the oxide layer and the displacement damage in silicon film. Besides, the measured results also(More)
In this paper, Ge surface passivation by GeO2 grown by N2O plasma oxidation is presented and experimentally demonstrated. Results show that stoichiometrically GeO2 can be achieved by N2O plasma oxidation at 350°C. The transmission electron microscope observation reveals that the GeO2/Ge interface is automatically smooth and the thickness of GeO2 is ∼0.9 nm(More)
As one of the most promising candidates for future nanoelectronic devices, tunnel field-effect transistors (TFET) can overcome the subthreshold slope (SS) limitation of MOSFET, whereas high ON-current, low OFF-current and steep switching can hardly be obtained at the same time for experimental TFETs. In this paper, we developed a new nanodevice technology(More)
In this paper, an interface treatment for (100) Ge using HCl cleaning with different concentration and passivation with HCl and NH<sub>4</sub>F is experimentally demonstrated. The root mean square roughness (Rms) of Ge surface is reduced from 1.95nm to 0.274nm by 36% HCl cleaning, due to the high efficiency to remove the sub-oxide on Ge surface. After the(More)
An acid-assisted microwave digestion procedure is optimized for the determination of trace elements in traditional Chinese medicine by the use of flame atomic absorption spectrometric (FAAS) techniques. Microwave-assisted digestion has the advantages of reduced time for sample dissolution, fewer possibilities for technical errors caused by spilling of hot(More)
In this paper, an enhanced Ge surface passivation method by nitrogen plasma immersion with adding RIE power is presented and experimentally demonstrated. With the acceleration effect resulting from electric field induced by proper RIE power, more nitrogen plasma will drift to Ge surface to passivate the dangling bonds. It is shown that nitrogen plasma(More)
The impacts of drive-in annealing and ion implantation process have been experimentally analyzed for the dopant segregation method by silicide as diffusion source, which provides the design guidelines for the application of dopant segregation technique. The results illustrate that the silicide as diffusion source technique is more sensitive to the ion(More)
Ge p-MOSFETs with two kinds of passivation methods, RTO-GeO<sub>2</sub> interfacial layer and nitrogen-plasma-passivation, were fabricated. CV and IV characteristics of both devices were measured and compared systemically. Results show that the RTO-GeO<sub>2</sub> interfacial layer is more efficient in passivating the donor-like interface state near the(More)