Wonje Choi

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—Multiple Voltage Frequency Island (VFI)-based designs can reduce the energy dissipation in multicore chips. Indeed, by tailoring the voltages and frequencies of each VFI domain, we can achieve significant energy savings subject to specific performance constraints. The achievable performance of VFI-based multicore platforms depends on the overall(More)
In an era when power constraints and data movement are proving to be significant barriers for high-end computing, multicore architectures offer a low-power and highly scalable platform suitable for both data- and compute-intensive applications. MapReduce is a popular framework to facilitate the management and development of big-data workloads. In this work,(More)
In recent years, designing specialized manycore heterogeneous architectures for deep learning kernels has become an area of great interest. However, the typical on-chip communication infrastructures employed on conventional manycore platforms are unable to handle <i>both</i> CPU and GPU communication requirements efficiently. Hence, in this paper, our aim(More)
During the last decade, we have witnessed a major transition from computation- to communication-centric design of integrated circuits and systems. In particular, the network-on-chip (NoC) approach has emerged as the major design paradigm for multicore systems-on-chip (SoC). The major challenges in traditional wire-based NoCs are the high latency and power(More)
Appreciation of exhibits in a museum can be equated to a virtual experience of lives in the contexts originally surrounding the exhibits. Here we focus on the importance of weight information, and hence tested whether experiencing a weight during museum exhibit appreciation affects the beholders' satisfaction and recognition memory for the exhibits. An(More)
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