WonHee Son

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This paper describes the implementation of highperformance 32-bit embedded processor, Core-A. Core-A processor has unique instruction set architecture(ISA) in the form of Reduced Instruction Set Computer(RISC). Especially, Core-A processor has several unique features for code density and DSP applications. Since Core-A processor is described using Verilog(More)
This paper presents a novel transformation technique that can derive various fast Fourier transform (FFT) in a unified paradigm. The proposed algorithm is to find a common twiddle factor at the input side of a butterfly and migrate it to the output side. Starting from the radix-2 FFT algorithm, the proposed common factor migration technique can generate(More)
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