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Recently, system designers are facing the challenge of developing systems that have diverse features, are more complex and more powerful, with less power consumption and reduced time to market. These contradictory constraints have forced technology providers to pursue design solutions that will allow design teams to meet the above design targets. In that(More)
High potentialities in terms of abstraction and re-use for hw design are offered by the recently proposed innovative extensions to VHDL, implementing object-oriented techniques. In this paper we evaluate the results of modelling ATM cells in Objective VHDL, exploiting the language features in terms of abstraction and reuse. The selected modules are(More)
Despite recent advances in FPGA, GPU, and general purpose processor technologies, the challenges posed by real-time digital image processing at high resolutions cannot be fully overcome due to insufficient processing capability, inadequate data transport and control mechanisms, and often prohibitively high costs. To address these issues, we proposed a(More)
Reconfigurable computing offers a wide range of low cost and efficient solutions for embedded systems. The proper choice of the reconfigurable device, the granularity of its processing elements and its memory architecture highly depend on the type of application and their data flow. Existing solutions either offer fine grain FPGAs, which rely on a hardware(More)
Heterogeneous reconfigurable processing architectures are often limited by the speed at which they can access data in external memory. Such architectures are designed for flexibility to support a broad range of target applications, including advanced algorithms with significant processing and data requirements. Clearly, strong performance of applications in(More)
When defining an object-oriented extension to VHDL, the necessary message passing is one of the most complex issues and has a large impact on the whole language. This paper identifies the requirements for message passing suited to model hardware and classifies different approaches. To allow abstract communication and reuse of protocols on system level, a(More)
OFFIS and Politecnico di Milano. This document may be copied freely for use in the public domain. Sections of it may be copied provided that acknowledgement is given of this original work. No responsibility is assumed by the REQUEST Project or its members for application or design, nor for any infringements of patents or rights of others which may result(More)