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A modification of the new edge-directed interpolation method is presented. The modification eliminates the prediction error accumulation problem with adopting a modified training window structure, and further extends the covariance matching into multiple directions for suppressing the covariance mis-match problem. Simulation results show that the proposed(More)
This paper proposes a double edge-triggered half­ static clock-gated D-type flip-flop (DHSCGFF), which consists of two parallel dynamic master latches connected in parallel and a single half-static latch with clock-gating circuit. The proposed DHSCGFF makes use of a clock-gating circuit to achieve better race tolerance, circuit compactness and energy(More)
Power has become a primary consideration during hardware design. Dynamic power can contribute up to 50% of the total power dissipation. Clock-gating is the most common RTL optimization for reducing dynamic power. By applying Effective clock-gating technique on RISC processor adds additional logic to the existing synchronous circuit to prune the clock tree,(More)
This paper focuses on interpreting low resolution computed tomography (CT) scan medical images using interpolation functions. Image processing operations such as zooming and segmentation are very commonly performed on these images in medical sciences. However, it is very challenging to perform such operations because of poor resolution of these images. Over(More)
Flash memories are now widely used in many portable electronic devices, in embedded systems and are even as replacement for computer hard disks. In flash memory systems, high-voltages (up to about 10 V) are indispensable for programming operations. In many cases, however, such programming voltages are not directly available from the supply, and are usually(More)