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There is a general lack of CAD tools for real-time embedded software, thus we have developed a software synthesis tool with a graphical user interface for real-time embedded systems. We propose an Interrupt Time Petri Nets (ITPN) model for real-time embedded software requirements modeling. ITPN can handle both interrupt behavior and real-time constraints on(More)
In this paper, we observe that the clock tree in a SoC is unbalanced in nature and derive that a RC clock tree has the characteristic of exact zero-skew upward propagation but not for an unbalanced RLC clock tree. Illustrated inductions are helped to prove the observation. We develop a zero-skew driven algorithm for constructing a RLC clock tree to minimize(More)