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Negative-bias temperature instability (NBTI) on high-k metal-gate SiGe p-channel MOSFETs has been examined. SiGe p-MOSFETs shows reduced interface states and enhanced NBTI reliability compared to their Si p-channel control devices as evidenced by experimental data. Impact of NBTI reliability on digital and RF circuits has been also examined using extracted(More)
In this work, influences of oxygen effect on an Hf-based high-k gate dielectric were investigated. A post deposition annealing (PDA) including oxygen ion after high-k dielectric deposition was used to improve reliability of the Hf-based high-k/metal gate device. The basic electrical characteristics of devices were compared with and without the PDA process.(More)
The behavior of two frequency divider circuits using negative differential resistance (NDR) circuit is studied. This NDR circuit is made of three resistors (R) and two bipolar-junction-transistor (BJT) devices. It can show the NDR characteristic in its current-voltage curve by suitably designing the resistances. We discuss a dynamic frequency divider, which(More)
We demonstrated a high-k/metal gate-last SiGe channel ultra ultra thin body and BOX (UTBB) CMOSFET process with optimized strain technology for high performance concerns. The impact of SOI thickness and strain from Ge, CESL, and high-k material/metal-gate are inspected. An appropriate post treatment is proposed to improve quality of stack Hf-based(More)
Keywords: SOI Strained SOI Strain silicon Contact etch stop layer (CESL) Gate oxide reliability TDDB Low frequency noise (LFN) a b s t r a c t This study investigates the effects of oxide traps induced by SOI of various thicknesses (T SOI = 50, 70 and 90 nm) on the device performance and gate oxide TDDB reliability of Ni fully silicide metal-gate strained(More)