Wen Chang Huang

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A high efficiency charge pump circuit which is realized by multi-staged high-voltage clock (HVC) generator is presented. The ten-staged HVC charge pump circuit could pump the voltage up to 21.35 V at a supply voltage of 2 V in 0.35 mum CMOS process. It also shows that the clock voltage increased linearly as the stages of the high-voltage clock generator was(More)
A new charge pump circuit with a clock that shows an increased clock voltage as its stage is increased is proposed in the paper. The charge pump circuit utilizes the cross-connected NMOS, voltage doubler, as a pumping stage. Each stage of the voltage-doubler provides a pair of complementary clock voltages. The clock voltage also increases as the stage of(More)
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