Weixia Xu

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Coverage problem is a fundamental issue in wireless ad hoc and sensor networks. Previous techniques for coverage scheduling often require accurate location information or range measurements, which cannot be easily obtained in resource-limited ad hoc and sensor networks. Recently, a method based on algebraic topology has been proposed to achieve coverage(More)
With the rapid improvement of computation capability in high performance supercomputer system, the imbalance of performance between computation subsystem and storage subsystem has become more and more serious, especially when various big data are produced ranging from tens of gigabytes up to terabytes. To reduce this gap, large-scale storage systems need to(More)
Heterogeneous multicore processor can integrate merits of different architecture, so it can achieve peak performance as high as processors with special architecture, while keeping as flexible as traditional general purpose processors at the same time. It is a challenge to design a memory sub-system for FT64-3, which is a heterogeneous multicore processor(More)
Hardware/software partitioning is a crucial problem in hardware/software co-design. In this paper, we deeply investigate genetic algorithm (GA) for hardware/software partitioning, our co-design targets a heterogeneous multicore system on chip (SoC) which consists of several different types of processing engines(PE), Communicating structure adopts NOC, We(More)
Buffer resources are key components of the on-chip router, shared-buffer structures are proposed to improve performance and reduce power consumption. This paper presents a novel on-chip network router with a shared-buffer based on Hierarchical Bit-line Buffer (HiBB). HiBB can be configured flexibly according to traffics and its inherent characteristic of(More)
Clock domain crossing (CDC) is an important issue in integrated circuit (IC) design and verification. In this paper, We present the design of 5 types of CDC schemes in our developed SOC chip with multi working mode and ten clock domain, deeply describe an approach using assertion-based verification (ABV) to verify proper functionality for CDC signals. Taped(More)
Supporting unbounded transactions and operating system (OS) are two notable challenges that need to be efficiently resolved by practically accepted hardware transaction memory (HTM) systems. Current proposals that heavily rely on traditional cache system to handle version management or conflict detection support poorly to resolve these two challenges.(More)