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—Continuous growth in network link rates poses a strong demand on high speed IP lookup engines. While Ternary Content Addressable Memory (TCAM) based solutions serve most of today's high-end routers, they do not scale well for the next-generation [1]. On the other hand, pipelined SRAM-based algorithmic solutions become attractive. Intuitively multiple(More)
—Packet classification is a fundamental enabling function for various applications in switches, routers and firewalls. Due to their performance and scalability limitations, current packet classification solutions are insufficient in addressing the challenges from the growing network bandwidth and the increasing number of new applications. This paper(More)
In this paper we present a novel architecture for high-speed and high-capacity <i>regular expression matching</i> (REM) on FPGA. The proposed REM architecture, based on nondeterministic finite automaton (RE-NFA), efficiently constructs <i>regular expression matching engines</i> (REME) of arbitrary regular patterns and character classes in a uniform(More)
Rapid growth in network link rates poses a strong demand on high speed IP lookup engines. Trie-based architec-tures are natural candidates for pipelined implementation to provide high throughput. However, simply mapping a trie level onto a pipeline stage results in unbalanced memory distribution over different stages. To address this problem, several novel(More)
Internet Protocol (IP) lookup in routers can be implemented by some form of tree traversal. Pipelining can dramatically improve the search throughput. However , it results in unbalanced memory allocation over the pipeline stages. This has been identified as a major challenge for pipelined solutions. In this paper, an IP lookup rate of 325 MLPS (millions(More)
—Lookup engines for various network protocols can be implemented as tree-like search structures. Mapping such search structures onto static random addressable memory (SRAM)-based pipeline architectures has been studied as a promising alternative to ternary content addressable memory (TCAM) for high performance lookup engines in next generation routers.(More)