Wei-Hsien Chen

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A 250 MHz analog baseband chain for Ultra-Wideband was implemented in a 1.2 V 0.13 m CMOS process. The chip has an active area of 0.8 mm . In the analog baseband, PGAs and filters are carried out by current-mode amplifiers to achieve wide bandwidth and wide dynamic range of gain, as well as low noise and high linearity. Besides, a current-mode Sallen–Key(More)
A 5 GHz double balanced mixer (DBM) is implemented in standard 90 nm CMOS low-power technology. A novel low-voltage self-bias current reuse technique is proposed in the RF transconductance stage to obtain better third-order intermodulation intercept point (IIP ) and conversion gain (CG) when considering the process variations. The DBM achieves a CG of 12(More)
This paper presents a fully integrated WiMAX frequency synthesizer. This synthesizer operation frequency is from 4.4GHz to 5.5GHz. It is a ΔΣ fractional-N synthesizer. It consist of an on-chip low drop out (LDO) regulated LC-VCO, a sigma delta noise shaper, a divider, and a high linearity charge pump. This synthesizer has been implemented in(More)
Ultra-low power (ULP) receivers can be applied in wearable and implantable biomedical sensors. In this paper, a ULP band-pass filter designed as a channel selection filter for low-IF FSK biomedical receivers is implemented in 1.8 V 0.18 μm CMOS process. Under power consumption of 200 μW, the measured central frequency and bandwidth is 1.5 MHz(More)
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