Wayne M. Loucks

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This paper examines memory management issues associated with Time Warp synchronized parallel simulation on distributed memory machines. The paper begins with a summary of the techniques which have been previously proposed for memory management on various parallel processor memory structures. It then concentrates the discussion on parallel simulation(More)
Optimistically synchronized parallel discrete-event simulation is based on the use of communicating sequential processes. Optimistic synchronization means that the processes proceed under the assumption that a synchronized execution schedule is fortuitous. Periodic checkpointing of the state of a process allows the process to roll back to an earlier state(More)
The main problem associated with comparing distributed discrete event simulation mechanisms is the need to base the comparisons on some common problem specification. This paper presents a specification strategy and language which allows the same simulation problem specification to be used for both distributed discrete event simulation mechanisms as well as(More)
The performance of various access control protocols for high-speed, bit-serial, computer communication rings is studied. Local Area Computer Network (LACN) applications in which message packets are of fixed length and shorter than the total inherent propagation delay around the ring are the focus of attention. Token, slotted, and static and dynamic(More)
The performance of various access control protocols for bit-serial local area computer network (LACN) rings is studied. Applications in which message packets are of fixed length and shorter than the total inherent propagation delay around the ring are the focus of attention. Token, slotted, and static and dynamic insertion rings are included in the study.(More)
— The system on chip paradigm consists of one or more instruction set processors integrated with custom hardware on a single integrated circuit. A uni-processor real-time kernel is presented that integrates hardware coprocessors by viewing them as system resources to be scheduled in conjunction with the processor. The kernel implements the earliest-deadline(More)