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Measurement and Compact Modeling of 1/f Noise in HV-MOSFETs
This paper investigates 1/f noise behavior under low and high drain biases of high-voltage metal-oxide-semiconductor field-effect transistors (MOSFETs) (HV-MOSFETs). A dedicated setup is presentedExpand
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High Voltage MOSFET Compact Modeling
This article presents state-of-the-art high-voltage (HV) transistor compact models and new developments. After a short look into the laterally diffused metal-oxide semiconductor (LDMOS) transistorExpand
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High-Voltage MOSFET Modeling
TLDR
In many new applications like communication and automotive electronics the usage of integrated high voltage MOS transistors (LDMOS and DMOS) requires highly accurate compact models. Expand
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Evaluation of Electromagnetic Coupling Between Microelectronic Device Structures Using Computational Electrodynamics
Electromagnetic coupling between devices in an microelectronic layout can become a serious design concern. In this paper, the problem of electromagnetic coupling is addressed from field computationalExpand
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Methodology for 1/f noise parameter extraction for high-voltage MOSFETs
abstract This paper proposes a detailed low frequency noise (LFN) parameter extraction method for high-voltage(HV) MOSFETs at low (50 mV) and medium (3 V) drain biases. In V d = 3 V region, noiseExpand
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Simple 1/f noise parameter extraction method for high-voltage MOSFETs
TLDR
A 1/f noise parameter extraction method for high-voltage (HV-)MOSFETs at 3V drain bias is presented in this paper. Expand
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Domain Decomposition via Electromagnetic Hooks for the Modeling of Complete RF blocks
TLDR
To cope with the complexity and size of modern RF SoC designs, a new type of domain decomposition has been developed that makes use of electric and magnetic connectors. Expand
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Analog Compact Modeling for a 20-120V HV CMOS Technology
In this paper we present a full characterization of HV CMOS transistors for a 20-120V CMOS technology including DC, AC and mismatch behavior. The model is based on a sub-circuit, which describes theExpand
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Impact of source/drain and bulk engineering on LFN performance of n- and p-MOSFET
Abstract In this paper, we present a detailed investigation of the impact of different Lightly Doped Drain (LDD) implants and different well doping on the low frequency noise performance of n- andExpand
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Analysis of drain bias dependence of 1/f noise in HV-MOSFETs
The behavior and dependence of 1/f noise versus drain bias in high-voltage (HV-)MOSFETs is examined in this paper. Low frequency noise of 50V N-and P-channel HV-MOSFETs was measured over a largeExpand