W C T Lee

Learn More
As silicon electronics approaches the atomic scale, interconnects and circuitry become comparable in size to the active device components. Maintaining low electrical resistivity at this scale is challenging because of the presence of confining surfaces and interfaces. We report on the fabrication of wires in silicon--only one atom tall and four atoms(More)
Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. The MIT Faculty has made this article openly available. Please share how this access benefits you. Your story matters. Abstract: We demonstrate CVD in situ doping of Ge by utilizing phosphorus(More)
A hybrid modeling approach of atomistic multi-million atom simulations [1,2] and semi-classical rate-equations is presented [3] to quantitatively model the experimental charge stability diagram of a single phosphorus donor quantum dot device. This work aims to provide further insight into the effects of dopant placement on the device behavior of(More)
  • 1