Vitor Grade Tavares

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IEEE 1149.1, commonly known as the joint test action group (JTAG), is the standard for the test access port and the boundary-scan architecture. The JTAG is primarily utilized at the time of the integrated circuit (IC) manufacture but also in the field, giving access to internal sub-systems of the IC, or for failure analysis and debugging. Because the JTAG(More)
Chronic exposure to Industrial Noise (IN), rich in Low Frequency Noise (LFN), causes systemic fibrotic transformation and sustained stress. Dental wear, significantly increased with exposure to LFN, affects the teeth particularly through the circumpulpar dentin. Our goal is to understand the consequences of IN exposure on the circumpulpar dentin of Wistar(More)
This paper addresses a modeling and simulation methodology for analog circuit design with amorphous-GIZO thin-film transistors (TFTs). To reach an effective circuit design flow, with commercially available tools, a TFT model has been first developed with an artificial neural network (ANN). Multilayer perceptron with backpropagation algorithm has been(More)
This paper presents an initiative to involve ECE undergraduate students in the design and deployment of a network infrastructure for an academic laboratory. The project aims at attaining a reliable and secure network for an IC CAD environment. The students focused on employing secure authentication, accounting and storage with single sign-on, based on(More)
This paper presents the characterization of fundamental analog and digital circuits with a-IGZO TFTs from measurements performed at normal ambient. The fundamental blocks considered in this work include digital logic gates, a low-power single stage high-gain amplifier with capcacitive bootstrapping and a level shifter/buffer. These circuits are important(More)