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Presence of biologically active inhibin-like material (ILM) in the rat prostate was demonstrated by suppression of in vitro follicle-stimulating hormone release from rat pituitaries, and its in vitro biosynthesis was studied by immunoprecipitation of 3H-leucine incorporated in ILM. In vitro biosynthesis of immunoreactive ILM (IR-ILM) was greater in prostate(More)
Modern Systems-on-Chip(SoCs) frequently power-off individual voltage domains to save leakage power across a variety of applications, from large-scale heterogeneous computing to ultra-low power systems in IoT applications. However, the considerable energy stored within the capacitance of the powered-off domain is lost through leakage. In this paper, we(More)
This paper describes a single-ended switch-capacitor harmonic-rejection power amplifier to operate in the 915 MHz ISM band for ZigBee applications. A multipath feed-forward harmonic-rejection technique is employed to suppress the 2nd/3rd/4th harmonics of the switch-capacitor power amplifier (PA) by 48/17/24 dB, respectively. The measured PA peak drain(More)
The continued trend toward increased silicon integration in recent years has enabled large, complex SoC systems encompassing an ever-expanding range of capabilities. Maintaining energy-efficient operation continues to be at the heart of high-performance and low-power mobile applications alike, highlighting the crucial role of low-power design methodologies(More)
Recent years have seen the emergence of 3D integration technology. This technology promises significant improvements in cost, capacity, bandwidth and power. The papers in this session will describe three diverse ways of leveraging the third dimension: silicon-interposer based 3D integration, stacked die using a fine-grained standard-cell design style, and(More)
Recent advances in neural networks (NNs) exhibit unprecedented success at transforming large, unstructured data streams into compact higher-level semantic information for tasks such as handwriting recognition, image classification, and speech recognition. Ideally, systems would employ near-sensor computation to execute these tasks at sensor endpoints to(More)
We present MATIC (Memory-Adaptive Training and In-situ Canaries), a voltage scaling methodology that addresses the SRAM efficiency bottleneck in DNN accelerators. To overscale DNN weight SRAMs, MATIC combines specific characteristics of destructive SRAM reads with the error resilience of neural networks in a memory-adaptive training process. PVT-related(More)