Vinay Verma

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We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than prior FPGA testing methods. We present 1- and 2-diagnosable built-in self-tester (BISTer) designs that make up the ROTE, and that avoid expensive adaptive diagnosis. To the best of(More)
— We present novel and efficient methods for built-in-self-test (BIST) of FPGAs for detection and diagnosis of permanent faults in current as well as emerging technologies that are expected to have high fault densities. Our basic BIST methods can be used in both on-line as well as off-line testing scenarios, though we focus on the former in this paper. We(More)
Incremental physical CAD is encountered frequently in the so-calledengineering change order (ECO) process in which design changes aremade typically late in the design process in order to correctlogical and/or technological problems in the circuit. Incrementalrouting is a significant part of an incremental physical designmethodology. Typically after an ECO(More)
We propose a roving tester (ROTE) that tests the PLBs of the FPGA by periodically moving across it. At any time, the ROTE occupies a certain area of the FPGA, say two columns, and tests all PLBs in that area using parallel built-in self-tester (BISTers). A significant contribution of this work are designs for 1- and 2-diagnosable BISTers. To the best of our(More)
In the present study, several new 1,3,4-oxadiazole derivatives linked with quinazolin-4-one moiety were synthesized by following steps. 2-methyl -4H-3, 1-benzoxazin-4-one, and 2-phenyl -4H-3, 1-benzoxazin-4-one were synthesized in the first and second step by stirring anthranilic acid in pyridine with benzoyl chloride and with an acetic anhydride for 30 min(More)
A nonlinear delayed mathematical model with immigration for the spread of an infectious disease cholera with carriers in the environment is proposed and analyzed. It is assumed that all susceptible are affected by carrier population density. The carrier population density is assumed to follow the logistic model and grows due to conducive human population(More)
We present novel and efficient methods for on-line testing and fault reconfiguration in FPGAs. The testing approach uses a ROving TEster (ROTE), which, while similar at a high level to a prior work, is significantly different in that the testing is much faster (thus reducing fault-detection latency) and has provable di-agnosability. We present 1-and(More)
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