Viktor Sverdlov

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We have used Monte Carlo simulation to calculate the shot-noise intensity S I (␻) at ͑two-dimensional͒ hopping using two models: a slanted lattice of localized sites with equal energies and a set of localized sites with random positions and energies. For wide samples we have found a similar dependence of the Fano factor FϵS I (0)/2eI on the sample length L:(More)
In this paper we analyze the possibility of creating a universal non-volatile memory in a near future. Unlike DRAM and flash memories a new universal memory should not require electric charge storing, but alternative principles of information storage. For the successful application a new universal memory must also exhibit low operating voltages, low power(More)
With the modern transistor size shrinking below 45 nm the classical drift-diffusion model to describe transport in the conducting channel is loosing its validity. In short-channel devices carriers get accelerated by the driving field and do not thermalize before they reach the drain contact. Thus, the assumption underlying the classical transport model,(More)
Numerical modeling of correlated single-electron tunneling in uniform two-dimensional arrays of small conducting islands separated by tunnel junctions shows the possibility of soliton-antisoliton avalanches. Though the time duration of any avalanche and the total charge, ⌬Qϭne, transferred across the array during the avalanche are always finite in arrays(More)
We have used modern supercomputer facilities to carry out extensive Monte Carlo simulations of 2D hopping (at negligible Coulomb interaction) in conductors with a completely random distribution of localized sites in both space and energy, within a broad range of the applied electric field E and temperature T, both within and beyond the variable-range(More)
— A novel non-volatile logic-in-memory (NV-LIM) architecture is introduced to extend the functionality of the spin-transfer torque magnetoresistive random-access memory (STT-MRAM) to include performing logic operations with no extra hardware added. The access transistors of the one-transistor/one-magnetic tunnel junction (1T/1MTJ) cells are used as(More)
Keywords: Logic-in-memory Material implication (IMP) Magnetic tunnel junction (MTJ) Non-volatile logic Spin-transfer torque (STT) a b s t r a c t As the feature size of CMOS components scales down, the standby power losses due to high leakage currents have become a top concern for modern circuit design. Introducing non-volatility in logic circuits allows to(More)
— Because of the easy integration with CMOS, non-volatility, reconfiguration capability, and fast-switching speed of magnetic tunnel junctions (MTJs), this work proposes and investigates stateful IMP-based logic gates and circuit architecture for future reconfigurable and nonvolatile computing systems. Stateful logic uses the memory unit (MTJ device) as the(More)
Simulated hole concentration along the fin in states " 1 " (a) and " 0 " (b) for a 11nm thin ZRAM device [8]. Abstract—In this paper we briefly discuss different memory technologies based on new storage information principles, highlight the most promising candidates for future universal memory, make an overview of the current state-of-the-art of these(More)
A rigorous analysis of the subband structure in thin silicon films under stress is performed. Calculated subband effective masses are shown to depend on shear strain and thickness simultaneously. The effective masses and the subband splitting determine transport in silicon films. Decrease of the transport effective mass controlled by the shear strain(More)