Viktor Sverdlov

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We have used Monte Carlo simulation to calculate the shot-noise intensity S I (␻) at ͑two-dimensional͒ hopping using two models: a slanted lattice of localized sites with equal energies and a set of localized sites with random positions and energies. For wide samples we have found a similar dependence of the Fano factor FϵS I (0)/2eI on the sample length L:(More)
In this paper we analyze the possibility of creating a universal non-volatile memory in a near future. Unlike DRAM and flash memories a new universal memory should not require electric charge storing, but alternative principles of information storage. For the successful application a new universal memory must also exhibit low operating voltages, low power(More)
In this paper a bottom-up approach for modeling field-effect biosensors (BioFETs) is developed. Starting from the given positions of charged atoms, of a given molecule, the charge and the dipole moment of a single molecule are calculated. This charge and dipole moment are used to calculate the mean surface density and mean dipole moment at the(More)
The ever increasing demand in fast and cheap bulk memory as well as electronics in general has driven the scaling efforts in CMOS since its very beginnings. Today, pushing the limits of integration density is still a major concern, but gradually power efficient computing gains more and more interest. A possible way to reduce power consumption is to(More)
With the modern transistor size shrinking below 45 nm the classical drift-diffusion model to describe transport in the conducting channel is loosing its validity. In short-channel devices carriers get accelerated by the driving field and do not thermalize before they reach the drain contact. Thus, the assumption underlying the classical transport model,(More)
— A novel non-volatile logic-in-memory (NV-LIM) architecture is introduced to extend the functionality of the spin-transfer torque magnetoresistive random-access memory (STT-MRAM) to include performing logic operations with no extra hardware added. The access transistors of the one-transistor/one-magnetic tunnel junction (1T/1MTJ) cells are used as(More)
— Because of the easy integration with CMOS, non-volatility, reconfiguration capability, and fast-switching speed of magnetic tunnel junctions (MTJs), this work proposes and investigates stateful IMP-based logic gates and circuit architecture for future reconfigurable and nonvolatile computing systems. Stateful logic uses the memory unit (MTJ device) as the(More)
Keywords: Logic-in-memory Material implication (IMP) Magnetic tunnel junction (MTJ) Non-volatile logic Spin-transfer torque (STT) a b s t r a c t As the feature size of CMOS components scales down, the standby power losses due to high leakage currents have become a top concern for modern circuit design. Introducing non-volatility in logic circuits allows to(More)
Numerical modeling of correlated single-electron tunneling in uniform two-dimensional arrays of small conducting islands separated by tunnel junctions shows the possibility of soliton-antisoliton avalanches. Though the time duration of any avalanche and the total charge, ⌬Qϭne, transferred across the array during the avalanche are always finite in arrays(More)
Spintronics attracts much attention because of the potential to build novel spin-based devices which are superior to nowadays charge-based microelectronic devices. Silicon, the main element of microelectronics, is promising for spin-driven applications. We investigate the surface roughness and electron-phonon limited spin relaxation in silicon films taking(More)