Vikram A. Saletore

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The ETA project at Intel Research and Development has developed a software prototype that uses one of the Intel® Xeon TM processors in a multi-processor server as a packet processing engine. The prototype is used as a vehicle for empirical measurement and analysis of a highly programmable packet processing engine that is closely tied to the server's core(More)
Consider the problem of exploring a large state-space for a goal state. Although many such states may exist, G.nding any one state satisfying the requirements is sufficient. All methods known until now for conducting such search in parallel fail to provide consistent linear speedups over sequential execution. The speedups vary between sublinear to(More)
It is argued that scheduling is an important determinant of performance for many parallel symbolic computations, over and above the issues of dynamic load balancing and grainsize control. We propose associating unbounded levels of priorities with tasks and messages as the mechanism of choice for specifying scheduling strategies. We demonstrate how(More)
Applications requiring high-speed TCP/IP processing can easily saturate a modern server. We and others have previously suggested alleviating this problem in multiprocessor environments by dedicating a subset of the processors to perform network packet processing. The remaining processors perform only application computation, thus eliminating contention(More)