Vikas Vijayvargiya

Learn More
This paper for the first time presents a novel, high-performance and robust current feed sense amplifiers (CF-SA) design for small <i>I<sub>Cell</sub></i> SRAM in 20nm Fin-shaped field effect transistor (FinFET) technology. The CFSA incorporates isolated DL current sensing approach which provides the higher Current Ratio Amplification (CRA) factor. The(More)
Noise margin and delay are main concern to VLSI circuit designers along with the device scaling. Therefore, in this paper, the work on various double gate NMOS structures employing gate and channel engineering like gate stack, halo implant and work function engineering is presented. The comparison of threshold voltage, ON and OFF current of various device(More)
For SRAM sense amplifiers (SAs), higher offset voltages lead to an increased likelihood of an incorrect decision. Because differential SA is vulnerable to the bias current offset in the differential legs. Thus, SRAM suffer from slow read speed or low read yield. This paper for the first time presents a novel differential-current-compensation based SA(More)
In this work, systematic investigation of DGTFET have been made by varying different device parameter such as dielectric constant, doping concentration, work function, temperature, and channel length with their variation impact on threshold voltage (Vth). It is also analyzed that while decreasing the value of work function, energy band overlap increases,(More)
  • 1