Vijaykrishnan Narayanan

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The analog-to-digital converter (ADC) is an essential part of system-on-chip (SoC) products because it bridges the gap between the analog physical world and the digital logical world. In the digital domain, low power and low voltage requirements are becoming more important issues as the channel length of MOSFET shrinks below 0.25 sub-micron values.(More)
Introduction: With growing challenges in maintaining physical gate-length (L g) scaling and device performance tradeoff, extending the technology roadmap with lateral devices to sub-10 nm technology node with 37nm contacted gate-pitch (L pitch) is becoming increasingly difficult. [1] At or beyond this point, vertical device architecture can bring in new(More)
1Department of Electrical Engineering, Pennsylvania State University, University Park, Pennsylvania 16802, USA, 2School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, Georgia 30332, USA, 3Department of Materials Science and Engineering, Cornell University, Ithaca, New York 14853, USA, 4Department of Materials Science and(More)
We compare the transient response of double-gate thin-body-silicon interband tunnel field-effect transistor (TFET) with its metal–oxide–semiconductor field-effect transistor counterpart. Due to the presence of source side tunneling barrier, the silicon TFETs exhibit enhanced Miller capacitance, resulting in large voltage overshoot/undershoot in its(More)
Information processing applications related to associative computing like image / pattern recognition consume excessive computational resources in the Boolean processing framework. This motivates the exploration of a non-Boolean computing approach for such applications. In this work, we demonstrate, (i) novel hybrid set of pair-wise coupled oscillators(More)
Abstract: Complete system simulation to understand the influence of architecture and operating systems on application execution has been identified to be crucial for systems design. This problem is particularly interesting in the context of Java since it is not only the application that can invoke kernel services, but so does the underlying Java Virtual(More)
This paper presents ferroelectric single-electron transistors (SETs) with tunable tunnel barriers and their application in a reconfigurable binary decision diagram (BDD) logic architecture. In this experimental demonstration, the SETs can be programmed into short, open, and Coulomb blockade modes to construct the BDD fabric. We experimentally demonstrate(More)
ion that can be used by others. The goal is to generate specialized architecture and make it easier to target software to heterogeneous HW. This is a difficult problem – at the junction of huge heterogeneity and we need a solution. No one has looked at this approach, as in the past there was a search for generality. Co-designed algorithms and architecture.(More)
This paper presents possible optimizations to reduce the energy budget for SoC designs that will be used in next generation multimedia systems. Since future multimedia systems will include the processor core(s), the entire memory system, system buses, YO controllers, system clocking and control and, in wireless applications, RF components, all on one chip,(More)
Integrated circuits and electronic systems, as well as design technologies, are evolving at a great rate—both quantitatively and qualitatively. Major developments include new interconnects and switching devices with atomic-scale uncertainty, the depth and scale of on-chip integration, electronic system-level integration, the increasing significance of(More)