Viduneth Ariyarathna

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A current-mode CMOS design is proposed for realizing receive mode multi-beams in the analog domain using a novel DFT approximation. High-bandwidth CMOS RF transistors are employed in low-voltage current mirrors to achieve bandwidths exceeding 4 GHz with good beam fidelity. Current mirrors realize the coefficients of the considered DFT approximation, which(More)
The synthesis of approximately frequency independent array factors at low hardware complexity using 2-D infinite impulse response (IIR) digital beam filters and nested uniform linear arrays is proposed. The array is designed to have multiple levels of nesting. Each level consists of a uniform linear array (ULA) covering a separate subband of the incident(More)
This paper introduces a new method for computing matrix exponential based on truncated Neumann series. The efficiency of the method is based on smart factorizations for evaluation of several Neumann series that can be done in parallel and divided across different processors with low communication overhead. A physical realization on FPGA is provided for(More)
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