Victor Dumitriu

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For most multi-modal stream processing tasks Dynamic Reconfigurable Systems-on-Chip (SoC) have demonstrated high efficiency in cost and power. These systems utilize partial reconfiguration for dynamic adaptation to changes in the workload or in environment. Mostly, reconfiguration mechanisms are based on central resource management sub-systems deployed in a(More)
Dynamic Partially Reconfigurable Computing(DPRC) systems have received significant attention in recent years as a potential alternative to traditional computing system designs; such systems implement much of their functionality in the form of virtual components, represented by configuration bit-streams. However, for such systems to be adopted as viable(More)
This paper presents a new approach to meeting communication requirements of on-chip network systems. The method is based on the transaction-oriented protocol employed by on-chip components, and the fact that latency becomes the performance-impacting factor instead of bandwidth. A network-on-chip topology generation and analysis tool is presented which has(More)
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Abstract—Field-Programmable Gate Arrays (FPGAs) are rapidly gaining popularity as implementation platforms for complex space-borne computing systems. However, such systems are exposed to cosmic(More)