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Asynchronous/Self-timed circuits are beginning to attract renewed attention as promising means of dealing with the complexity of modern VLSI designs. Very few analysis techniques or tools are available for estimating their performance. In this paper we adapt the theory ofGeneral-ized Timed Petri-nets (GTPN)for analyzing and comparing asynchronous circuits(More)
This paper discusses the architecture and performance studies of Datacenter Optical Switch (DOS) designed for scalable and high-throughput interconnections within a data center. DOS exploits wavelength routing characteristics of a switch fabric based on an Arrayed Waveguide Grating Router (AWGR) that allows contention resolution in the wavelength domain.(More)
The basic building block of on-chip nanophotonic interconnects is the microring resonator [14], and these res-onators change their resonant wavelengths due to variations in temperature-a problem that can be addressed using a technique called " trimming " , which involves correcting the drift via heating and/or current injection. Thus far system researchers(More)
We present Synchroscalar, a tile-based architecture forembedded processing that is designed to provide the flexibilityof DSPs while approaching the power efficiency ofASICs. We achieve this goal by providing high parallelismand voltage scaling while minimizing control and communicationcosts. Specifically, Synchroscalar uses columnsof processor tiles(More)
—Designers are increasingly relying on field-pro-grammable gate array (FPGA)-based emulation to evaluate the performance of low-density parity-check (LDPC) codes empirically down to bit-error rates of 10 12 and below. This requires decoding architectures that can take advantage of the unique characteristics of a modern FPGA to maximize the decoding(More)
Microring resonator-based photonic interconnects are being considered for both on-chip and off-chip communication in order to satisfy the power and bandwidth requirements of future large scale chip multiprocessors. However, microring resonators are prone to malfunction due to fabrication errors, and they are also extremely sensitive to fluctuations in(More)
We propose a systematic technique for characterizing the workload of a video decoder at a given time and transforming the shape of the workload to optimize the utilization of a critical resource without compromising the distortion incurred in the process. We call our approach proactive resource management. We will illustrate our techniques by addressing the(More)
The Ethernet switch is a primary building block for today's enterprise networks and data centers. As network technologies converge upon a single Ethernet fabric, there is ongoing pressure to improve the performance and efficiency of the switch while maintaining flexibility and a rich set of packet processing features. The OpenFlow architecture aims to(More)
paper describes a novel sequential wavelength-time-space (sWTS) scheduling algorithm to solve the arbitration problem in an all-optical packet switch router and shows the simulation as well as the hardware implementation results. The simulation results with self-similar traffic input demonstrate that the sWTS arbitration algorithm effectively improves the(More)