Vasantha Kumar Petta

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In today's nanometric VLSI designs achieving both power and performance targets is the top most priority for design closure. Globally asynchronous locally synchronous (GALS) architectures can offer less dynamic power and improved performance due to absence of global clock. In GALS SoC architectures each synchronous blocks runs on their local clocks.(More)
With the improving evolution in VLSI technology most of the digital circuits are becoming SOCs. However most of the SOC systems are synchronous designs and the issues like clock skew, power consumption and EMI are related to clock network. Asynchronous circuits can offer benefits like reduced power and improved performance. However implementing whole design(More)
With the improving evolution in VLSI technology most of the digital circuits are becoming SOCs. However most of the SOC systems are synchronous designs and the issues like clock skew, power consumption and EMI are related to clock network. Asynchronous circuits can offer benefits like reduced power and improved performance. However implementing whole design(More)
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