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This paper presents an approach for development of cost-effective hardware platform for video/image processing. The approach utilizes the SRAM based reconfigurable logic devices (FPGAs) and, their capability of run-time temporal partitioning of logic resources. We propose the architecture for multi-mode video-stream processor with cyclically reconfigurable(More)
This paper presents an approach for development of cost-effective custom video/image processing systems. The approach utilizes the concept of temporal partitioning of resources in the partially reconfigurable FPGA devices. Paper proposes architecture of the multi-mode video-stream processor with cyclically reconfigurable structure. The cost-effectiveness of(More)
− When testing an analog-to-digital converter (ADC) by automatic test equipment (ATE), the latter is capable of performing extensive processing of output responses of the ADC. This allows detection of virtually any fault. However, the cost of ATE is quite high. As well, the external bandwidth of ATE is normally lower than the internal bandwidth of the ADC(More)
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Abstract—Field-Programmable Gate Arrays (FPGAs) are rapidly gaining popularity as implementation platforms for complex space-borne computing systems. However, such systems are exposed to cosmic(More)
A high-speed visual processing system often requires real-time algorithm adaptation because of environmental changes, user requests or multi-object processing standards. The reconfigurable platform based on a run-time reconfigurable FPGA can employ dynamic algorithm adaptation if the reconfiguration overhead stays within the application's temporal(More)