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We describe a neural spike-sorting processor that provides unsupervised clustering simultaneously for 16 channels. The use of a two-stage clustering algorithm, noise-tolerant distance metric, and selectively clocked high-V T register arrays makes online clustering feasible for implementation. The spike-sorting processor has a power consumption of 75µW at(More)
—Wireless neural recording systems are subject to stringent power consumption constraints to support long-term recordings and to allow for implantation inside the brain. In this paper, we propose using a combination of on-chip detection of action potentials (" spikes ") and compressive sensing (CS) techniques to reduce the power consumption of the neural(More)
– This paper shows that due to their negligibly low leakage, in certain applications, chips utilizing power gates built even with today's relatively large, high-voltage micro-electro-mechanical (MEM) relays can achieve lower total energy than those built with CMOS transistors. A simple analysis provides design guidelines for off-time and savings estimates(More)
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