• Publications
  • Influence
Indirect feedback compensation of CMOS op-amps
  • V. Saxena, R. J. Baker
  • Computer Science
  • IEEE Workshop on Microelectronics and Electron…
  • 28 August 2006
This paper presents the design of CMOS op-amps using indirect feedback compensation technique, which results in much faster and low power op-amp. Expand
Indirect Feedback Compensation Technique for Multi-Stage Operational Amplifiers
This thesis presents novel multi-stage topologies for singly ended as well as fully differential op-amps with the highest performance ever reported. Expand
Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition
A neuromorphic chip that combines CMOS analog spiking neurons and memristive synapses offers a promising solution to brain-inspired computing, as it can provide massive neural network parallelism and density. Expand
Compensation of CMOS op-amps using split-length transistors
Theoretical and experimental results are presented for op-amp compensation using split-length transistors. Expand
A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning
We present a novel leaky integrate-and-fire neuron design that implements the dual-mode operation of current integration and synaptic drive and enables in situ learning with crossbar resistive synapses. Expand
Efficient design and synthesis of decimation filters for wideband delta-sigma ADCs
A design methodology for synthesizing power-optimized decimation filters for wideband Delta Sigma (ΔΣ) analog-to-digital converters for next-generation wireless standards is presented. Expand
A Low-Power Single-Bit Continuous-Time ΔΣ Converter with 92.5 dB Dynamic Range for Biomedical Applications
A third-order single-bit CT-ΔΣ modulator for generic biomedical applications is implemented in a 0.15 µm FDSOI CMOS process. The overall power efficiency is attained by employing a single-bit ΔΣ andExpand
A K-Delta-1-Sigma modulator for wideband analog to digital conversion
K-Delta-1- Sigma (KD1S) modulator-based ADC with inherent time-interleaving with a shared opamp and K-quantizing paths . Expand
Indirect compensation techniques for three-stage fully-differential op-amps
  • V. Saxena, R. J. Baker
  • Engineering, Computer Science
  • 53rd IEEE International Midwest Symposium on…
  • 16 August 2010
A reversed-nested indirect compensated (RNIC) topology, employing double pole-zero cancellation, is illustrated for the design of three-stage fully-differential op-amps. Expand
Reconfigurable Threshold Logic Gates using memristive devices
We present our early design exploration of reconfigurable Threshold Logic Gates (TLG) implemented using Silver-chalcogenide memristive devices combined with CMOS circuits. Expand