V. C. Prasad

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—In this paper, selection of test nodes has been studied extensively and efficient techniques are proposed. Two broad categories of methods called inclusion methods and exclusion methods are suggested. Strategies are presented to select or delete a test node without affecting the diagnosis capabilities. Examples show that these strategies give less number(More)
—This paper presents a review of phase locked loop (PLL) techniques. The different types of phase detector, loop filter and oscillators are discussed. It alleviates the problems associated with the classical analog PLL. Linear PLL, Digital PLL and All digital PLL models are implemented in Simulink Simulation results in Simulink gives the performance(More)
In this brief, a read-only-memoryless structure for binary-to-residue number system (RNS) conversion modulo {2 n ±k} is proposed. This structure is based only on adders and constant multipliers. This brief is motivated by the existing {2 n ± k} binary-2-RNS converters, which are particular inefficient for larger values of n. The experimental results(More)