A framework of controlled execution with explicit model is proposed that increases the reliability and fault tolerance of hardware-software complexes with complex architecture. This framework was developed at the Scientific Research Institute of System Analysis of Russian Academy of Sciences.
1. PROBLEM STATEMENT The incorporation of explicit parallelism into (micro)-processor architectures is one of the basic ways to improve computer performance. In the paper, we consider code generation for high-level languages for processors possessing the following two properties: (i) there are several function units that can operate simultaneously; (ii) a… (More)