Umberto Gatti

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We propose a digital background adaptive calibration technique for correcting offset and gain mismatches in time-interleaved multipath analog-digital (A/D) sigma-delta (/spl Sigma//spl Delta/) modulators. The proposed technique allows us to cancel the spurious tones introduced by offset and gain mismatches among the paths only by processing the digital(More)
The authors address some fundamental issues in track-and-hold (T&H) design. A number of explicit expressions characterising the main limitations of this class of circuits are given. A fully differential open-loop T&H is presented satisfying the stringent specifications imposed by present telecom applications. It exhibits high-resolution (12 bit) and(More)
This paper describes a 0.35-/spl mu/m CMOS fourth-order bandpass analog-digital sigma-delta (/spl Sigma//spl Delta/) modulator for wide-band base stations receivers. The modulator, based on a time-interleaved four-path architecture, achieves an equivalent sampling frequency of 280 MHz, although the building blocks operate at only 70 MHz. In measurements,(More)
In this paper we present an integrated 155 Mb/s burst-mode receiver (BMR) for passive optical network (PON) applications. The chip receives optical signals over a wide dynamic range (-27 dBm to 1 dBm) and temperature range (-40° C to +85° C). The chip was implemented using a sub-micron SiGe BiCMOS technology and occupies an area of 4.3 × 4.9(More)
Deisgn automation for analog/mixed-signal (A/MS) circuits and systems is still lagging behind compared to what has been reached in the digital area.As System-on-Chip (SoC) designs include analog components in more cases, these analog parts become even more a bottle neck in the overall design process.The paper is dedicated to latest R&D activities within(More)
This BiCMOS track and hold (T&H) circuit is intended for use as the front end of an A/D conversion system. The T&H operates at 250MHz sampling rate and is capable of limiting the harmonic distortion to -62dB for a 70MHz sinewave input. Similar results are obtained with 10MHz input sinewaves and 200MHz sampling frequency. The circuit exhibits hold-mode(More)
A Hall magnetic sensor working in the current domain and its electronic interface are presented. The paper describes the physical sensor design and implementation in a standard CMOS technology, the transistor level design of its high sensitive front-end together with the sensor experimental characterization. The current-mode Hall sensor and the analog(More)
The performances of a current-mode Hall sensor featuring output current signals are discussed. The current-mode approach is analyzed by applying for first time to our best knowledge the spinning current technique to Hall plate working in current-mode to eliminate offset and 1/f noise. Among different geometries that have been studied and simulated using(More)
This paper describes a magnetic Hall sensor working in current mode and its electronic interface. The microsystem uses the current spinning technique to compensate for the offset and provides a differential output signal current. The use of a low-noise chopper stabilized operational amplifier enables the integration of the signal current and ensures, after(More)