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- Ugur Kalay, Douglas V. Hall, Marek A. Perkowski
- IEEE Trans. Computers
- 2000

A testable EXOR-Sum-of-Products (ESOP) circuit realization and a simple, universal test set which detects all single stuck-at faults in the internal lines and the primary inputs/outputs of the realization are given. Since ESOP is the most general form of AND-EXOR representations, our realization and test set are more versatile than those described by other… (More)

- Ugur Kalay, Marek A. Perkowski, Douglas V. Hall
- ISMVL
- 1999

- Ugur Kalay, Nagesh Venkataramaiah, Alan Mishchenko, Douglas V. Hall, Marek A. Perkowski
- 2004

It is well-known that AND/EXOR circuits are more easily testable than AND/OR circuits. Therefore, in this paper, we primarily propose to use AND/EXOR realizations for implementation of the combinational logic parts of finite state machines. Then, we investigate the effect of different state assignments (i.e. one-hot, gray-code, etc.) and that of using… (More)

- Ugur Kalay, Marek A. Perkowski, Douglas V. Hall, Bernd Steinbach, Shah Amran Shahjahan
- 2007

Easily testable two-level AND-EXOR circuits have been investigated by many researchers. However, twolevel AND/EXOR circuits (i.e. ESOP) can be areaconsuming and slow; therefore they should be factorized. In this paper, a new AND-EXOR factorization method based on rectangle covering is presented. A factorized multi-level AND/EXOR circuit can be partitioned… (More)

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