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A High-Speed Wave Digital Filter using Carry-Save Arithmetic
  • U. Kleine, M. Bohner
  • Computer Science
  • ESSCIRC '87: 13th European Solid-State Circuits…
  • 1 September 1987
TLDR
To test the performance of recursive digital filters for high sampling rate applications, such as pulse former filters or filters for intermediate frequencies of TV sets and radios, a bit-parallel third order lowpass filter has been designed and fabricated in a 2 μm CMOS technology. Expand
Symbolic Pole/Zero Calculation using SANTAFE
TLDR
SANTAFE (Symbolic Analysis of Transfer Functions) applies the signal-flow graph method which tries to keep the result in a factorized form. Expand
Design of a complementary folded-cascode operational amplifier
TLDR
The design of a complementary folded-cascode operational amplifier with rail-to-rail input range for low voltage operation is described. Expand
Design of Bireciprocal Wave Digital Filters for High Sampling Rate Applications
Abst rac t : In this paper, the realization of bireciprocal wave digital filters (WDF's) in a dedicated bit-parallel architecture will be described. These filters are especially attractive for highExpand
A novel class of complementary folded-cascode opamps for low voltage
TLDR
Three novel complementary folded-cascode operational amplifiers (opamps) with high gain, large bandwidth, and rail-to-rail input range for low-voltage operation will be presented. Expand
Wave digital filters using carry-save arithmetic
  • U. Kleine, T. Noll
  • Mathematics
  • ., IEEE International Symposium on Circuits and…
  • 7 June 1988
TLDR
A carry-save approach for the implementation of high-speed bit-parallel recursive digital filters is presented to ensure the full pseudopassivity of the circuits. Expand
Design of nonlinear analog switched-capacitor circuits using building blocks
This paper describes an approach to the design of nonlinear analog switched-capacitor (SC) circuits using building blocks. First, we derive a number of nonlinear SC circuits, such as comparators,Expand
Design of a Cascoded Operational Amplifier with High Gain
  • B. Lipka, U. Kleine
  • Engineering
  • 14th International Conference on Mixed Design of…
  • 21 June 2007
TLDR
In this paper the design of a CMOS cascoded operational amplifier is described. Expand
An automated design tool for analog layouts
TLDR
We present a layout synthesis tool, named as ALADIN, for the design of analog integrated circuits. Expand
A hybrid evolutionary analogue module placement algorithm for integrated circuit layout designs
TLDR
This paper presents an integrated approach of simulated annealing (SA) and genetic algorithm (GA) for the analogue module placement in mixed-signal integrated circuit layout designs. Expand
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