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- Chuan-lin Wu, Tse-Yun Feng
- IEEE Trans. Computers
- 1980

A baseline network and a configuration concept are introduced to evaluate relationships among some proposed multistage interconnection networks. It is proven that the data manipulator (modified version), flip network, omega network, indirect binary n-cube network, and regular SW banyan network (S = F = 2) are topologically equivalent. The configuration… (More)

- Chuan-lin Wu, Tse-Yun Feng
- IEEE Trans. Computers
- 1980

Properties of the reverse-exchange interconnection network are used to develop a reconfiguration scheme and a two-pass structure for enhancing the efficiency of a class of multistage interconnection networks. Functional relationships among a class of multistage interconnection networks are first derived. According to the functional relationships, we propose… (More)

- Yao-Ming Yeh, Tse-Yun Feng
- IEEE Trans. Computers
- 1992

- Chuan-lin Wu, Tse-Yun Feng
- IEEE Trans. Computers
- 1981

- Tse-Yun Feng, Chuan-lin Wu
- IEEE Trans. Computers
- 1981

- Yao-Ming Yeh, Tse-Yun Feng
- J. Parallel Distrib. Comput.
- 1992

- Seung-Woo Seo, Tse-Yun Feng, Hyoung-Il Lee
- IEEE Trans. Parallel Distrib. Syst.
- 1999

ÐIn this paper, we analyze ways of realizing permutations in a class of 2log2Nor (2log2N ÿ 1)-stage rearrangeable networks. The analysis is based on the newly developed inside-out routing algorithm [1] and we derive the upper and lower bounds on the number of possible realizations of a permutation. It is shown that the algorithm can provide us with… (More)

- Tse-Yun Feng, Seung-Woo Seo
- IEEE Trans. Computers
- 1994

The original paper presents an efficient algorithm for routing an Omega -1 × Omega nonblocking network. This comment presents an extra step required to route an Omega + Omega network.

- Seung-Woo Seo, Tse-Yun Feng
- IEEE Trans. Parallel Distrib. Syst.
- 1995

- Tse-Yun Feng
- IEEE Trans. Computers
- 1974

This paper shows that there exists a class of functions called data manipulating functions (DMF's), in sequential as well as paralel processors. The circuits used to achieve these functions can be considered to form an independent functional block, caUed a data manipulator. A basic organization applicable to both sequential and parallel processors is then… (More)