Toshimi Kobayashi

Learn More
This paper presents the implementation and results of the test suite for DSM ASIC consisting of static, ∆Iddq, and dynamic patterns based on scan, and quantitatively reports the advantages of dynamic pattern over AC static pattern, even at a low frequency, and advantages of ∆Iddq test over traditional Iddq. A defect level calculation method is presented(More)
We have developed a 2-bit 32 GS/s soft decision LSI in 0.13 μm SiGe-BiCMOS. The LSI includes a flash type Analogue-to-Digital converter and an encoder which outputs the soft decision results, which are a hard decision bit and a confidence bit for strong Forward Error Correction. We have confirmed that the LSI has 25 mVpp sensitivity and the LSI enables(More)
  • 1