Toru Chiba

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A hierarchical layout system for VLSI provided with placement and routing facilities is described, highlighting the routing scheme constructed on the basis of a channel router. Several implementation results are also shown to reveal how much the system has potentialities to be of great use in the practice of layout design of full custom LSI's.
Recent advances in the packaging technology of microelectronics have changed the design rules for <underline>printed wiring boards</underline> (PWB's) such that the number of wiring tracks between adjacent pins of an ordinary <underline>dual in line package</underline> (DIP) is allowed to be two or more, and the number of signal layers to be laminated is(More)
An automatic placement algorithm for standard cell and polycell LSI is described, which is constructed on the basis of heuristics for a set of interrelated placement subproblems. The algorithm is incorporated into a hierarchical layout system intended not only for standard cell and polycell LSI but for general cell LSI, by which standard cell and polycell(More)
PURPOSE Superficial temporal artery (STA)-middle cerebral artery (MCA) bypass is an important technique for cerebrovascular reconstruction. Intraoperative hemodynamic imaging is needed to perform cerebrovascular reconstruction safely and effectively. Optical intrinsic signal (OIS) imaging is commonly used for assessing cerebral hemodynamics in experimental(More)
This paper presents hardware design of an IMDCT accelerator for an Ogg Vorbis decoder using a C-based design system. Low power implementation of audio codec is important in order to achieve long battery life of portable audio devices. Through the computational cost analysis of the whole decoding process, it is found that Ogg Vorbis requires higher operation(More)