Tooraj Nikoubin

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Differential Cascode Voltage Switch (DCVS) is a well-known logic style, which constructs robust and reliable circuits. Two main strategies are studied in this paper to form static DCVS-based standard ternary fundamental logic components in digital electronics. While one of the strategies leads to fewer transistors, the other one has higher noise margin. New(More)
Any system which is associated with human assistance needs to be portable, user-friendly and simple in structure. In a navigation system specially built to provide a walking assistance for visually impaired people, it is needed to map the surrounding in terms of a number of obstacles in the path of the person. In this paper, we are going to present a system(More)
Owning to rapid growth in standard-cell-based synthesized designs; the efficiency of standard cells has increasingly become important. In this line, the Cell Design Methodology (CDM) has systematically meditated to present some new efficient designs such as three 2-input XORs and full adder in hybrid CMOS logic style which are the most significant and(More)
This paper presents two novel Vedic-multiplier architectures which follow the technique of concatenation and rearrangement of partial products. These architectures exhibit their excellence in speed, area, and power. Thus resulting in energy-efficient operation and improved Energy-Area product. The first design is Ripple carry adder based partial product(More)
High-performance low power arithmetic circuit with least area, is essential for advanced processes. This paper proposes a new view of logic design with the name of Complement Based Logic Design (CBLD) has been presented for modeling and optimization of some arithmetic building blocks which have used a kind of conditional operation in their input stage,(More)
In this paper, the CDM logic style has been analyzed and compared with the Conventional CMOS (C-CMOS) logic style with the FinFET devices in super-threshold operation. Standard cell library with FinFET logic gates in CDM and C-CMOS logic style has been developed in various selected technologies (7nm, 10nm, 14nm, 16nm & 20nm) and used to synthesize the(More)
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