Tomislav Svedek

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Aiming at the reduction of the existing digital gap between many rural and urban european areas as well as at the optimization of the rural broadband access deployment costs, several rural broadband deployment cases in the Republic of Croatia are compared in this paper. The comparison is conducted from the business and the regulatory point of view, and the(More)
This paper analyzes the performance of the hybrid Amplitude Shape Modulation (h-ASM) scheme for the time-hopping ultra-wideband (TH-UWB) communication systems in the single and multi-user environment. h-ASM is the combination of Pulse Amplitude Modulation (PAM) and Pulse Shape Modulation (PSM) based on modified Hermite pulses (MHP). This scheme is suitable(More)
Due to wide power spectrums of rectangular data streams, it is important for base-band signals to be heavily band limited before modulation. That can be achieved by pulse shaping of rectangular bits. Some of the most common are a half-sine pulse shaper and a Gaussian pulse shaper which are used in Minimum Shift Keying (MSK), Gaussian Minimum Shift Keying(More)
This paper analyzes performances of the Pulse Interval Modulation (PIM) scheme for impulse radio ultra-wideband (IR-UWB) communication systems. Due to the PIM anisochronous nature, a tap delay line (TDL) coded division multiple access (CDMA) scheme based on strict optical orthogonal codes (SOOC) is proposed. This scheme is suitable for multiuser high-speed(More)
This paper presents an ID tag concept which is LED powered. The photovoltaic effect of the LED array is used to harvest energy from ambient light or from light source in reader device in order to power the tag. Harvested energy is stored in a capacitor that is used to supply ID tag logic which transmits ID information using one diode of LED array which is(More)
Problems encountered in the implementation of an all-digital delay-locked loop (DLL) in programmable logic devices (PLD) are presented. All parts of a DLL are only created by discrete digital elements. A digital controlled delay line (DCDL) consists of digital controlled delay elements (DCDE) realized by a number of LCELLs (basic delay elements in ALTERA's(More)