Tomas Bauer

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The Through Silicon Via (TSV) process developed by Silex offers sub 50 μm pitch for through wafer connections in up to 600 μm thick substrates. Silex via process enables MEMS designs with significantly reduced die size and true "Wafer Level Packaging" features that are particularly important in consumer market applications. The TSV technology also enables(More)
The through silicon via (TSV) process developed by Silex provides down to 30 mum pitch for through wafer connections in up to 600 mum thick substrates. Integrated with MEMS designs it enables significantly reduced die size and true ldquoWafer Level Packagingrdquo - features that are particularly important in consumer market applications. The TSV technology(More)
The Through Silicon Via (TSV) process developed by Silex provides down to 30 μm pitch for through wafer connections in up to 600 μm thick substrates. Integrated with MEMS designs it enables significantly reduced die size and true "Wafer Level Packaging" features that are particularly important in consumer market applications. The TSV technology also enables(More)
Beginning in the mid-1990s, Sandia National Laboratories began its migration to Silicon-on-Insulator (SOI) wafers to develop a radiation-hardened semiconductor process for sub-0.5mum geometries. Successfully radiation hardening SOI technologies enabled an in-house processing familiarity that exceeded our expectations by opening opportunities to improve(More)
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