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The explosion of multimedia applications within embedded devices has ensured that Image Processing and Machine Vision has now become a mainstream subject within most Computer Science and Electronic Engineering curricula. Yet often there exists a disconnection between the rapid prototyping tools that are taught within the laboratory to demonstrate concepts(More)
Voice over IP (VoIP) is an emerging service and has gained popularity in recent years. The most challenging task for a service provider is to provide and monitor better voice quality. The nature of quality of service (QoS) in VoIP networks is very variable and hence it is important to be able to measure the QoS offered by the system in real time with a low(More)
This paper presents a novel Multiresolution, Perceptual and Vector Quantization (MPVQ) based video coding scheme. In the intra-frame mode of operation, a wavelet transform is applied to the input frame and decorrelates it into its frequency subbands. The coefficients in each detail subband are pixel quantized using a uniform quantization factor divided by(More)
In Mobile Ad-hoc Networks (MANETs), the majority of protocols developed to date provide QoS mechanisms by assigning high priority to delay-sensitive applications. While today's Internet traffic is still dominated by TCP based applications, the negative effects of the IEEE 802.11e service differentiation scheme on TCP performance in the presence of high(More)
In this paper a new hybrid multiresolution human visual system and statistically based image coding scheme is presented. It decorrelates the input image into a number of subbands using a lifting based wavelet transform and employs a novel statistically based coding algorithm to code the coefficients in the detail subbands. Perceptual weights are applied to(More)
Here we present our multi-core architectures for object detection. We move away from the traditional architecture of Multi-Processors (MPs) by using cacheable accesses to main memory to create atomic cores and utilising local memory for all program data. Main memory is partitioned through software into dedicated data regions to allow atomic accesses by(More)
Adapting software applications to embedded Multiprocessor System on Chips (MPSoCs) typically follows multithreaded design flows. To take advantage of the hardware customisations possible with MPSoCs, HardWare Threads (HWTs) can be used to increase application concurrency and throughput by forking between software and hardware execution. This paper describes(More)