Tomás Bautista

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System-level simulation and design space exploration (DSE) are key ingredients for the design of multiprocessor system-on-chip (MP-SoC) based embedded systems. The efforts in this area, however, typically use ad-hoc software infrastructures to facilitate and support the system-level DSE experiments. In this paper, we present a new, generic system-level(More)
As SoC complexity grows new methodologies and tools for system design and time-effective ditsign space exploration are required. In this paper we introduce a tool called CASSE, what stands for Camellia system-on-chip simulation environment. CASSE is a fast, flexible, and modular SystemC-based simulation environment which aims to be useful for design-space(More)
In this paper, we present a two-phase design space exploration (DSE) approach to address the problem of real-time application mapping on a flexible MPSoC platform. Our approach is composed of two independent phases – analytical estimation/pruning and system simulation – communicating via a well-defined interface. The strength of the resulting strategy is(More)
In this article, we present a flexible and extensible system-level MP-SoC design space exploration (DSE) infrastructure, called NASA. This highly modular framework uses well-defined interfaces to easily integrate different system-level simulation tools as well as different combinations of search strategies in a simple plug-and-play fashion. Moreover, NASA(More)
New generation electronic system-level design tools are the key to overcome the complexity and the increasing design productivity gap in the development of future multiprocessor systems-on-chip. This paper presents a SystemC-based system-level simulation environment, called CASSE, which helps in the modeling and analysis of complex SoCs. CASSE combines(More)
In this paper, we present the strategy for evaluating the performance of a variety of configurations of an architecture template for a computer vision system (CVS). For this study a generic model of an architecture is used to address the modular design of the CVS. This modular nature approach could be used to build a more complex system by integrating(More)
Recently, a new programming model and platform interface for MPSoC design and integration called TTL (Task Transaction Level) has been developed and advocated as a standard. In this paper, a specific implementation of the TTL interface named ITCP (Inter-Task Communication Protocol) is presented. ITCP is well suited for both hardware and software(More)