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The progression of implementation technologies into the sub-100 nanometer lithographies renew the importance of understanding and protecting against single-event upsets in digital systems. In this work, the effects of transient faults on high performance microprocessors is explored. To perform a thorough exploration, a highly detailed register transfer(More)
Because of technology restraints and limited amounts of ILP, increased single-threaded performance through automatic thread generation has been one of the more appealing approaches for advancement in recent years. Dynamic Multithreading was one of the original hardware-only approaches in this area, but it only exploited very simple control independence,(More)
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