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A full-rate ADSL central-office line driver consumes 610mW through active termination and a zero-overhead class G technique. The supply switching scheme features very low overhead voltage, logic control, and controlled supply-rail ramp rate, and requires analog signal-peak prediction to be performed on the digital data stream.
The explosion of social media and availability of open source data has created an unprecedented opportunity to expose hidden intelligence. In this work we explore the use of a pipeline of novel algorithms executing within a parallel computing framework to improve SNA performance as compared to baseline approaches. These initial findings show improvements in… (More)
A fully integrated active hybrid, fabricated in 16V oxide-isolated complementary BiCMOS, performs 2-wire to 4-wire conversion. Hybrid rejection >25dB is achieved across the entire ADSL band is < 7minus;136dBm/Hz referred to the loop terminals. Hybrid area is 4.24mm/sup 2/ and consumes <63mW.