Tim R. LaRocca

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—A new injection-locked frequency divider (ILFD) circuit topology, by combining the strengths of LC type ILFD (LC_ILFD) and ring oscillator type ILFD (RO_ILFD), is proposed to achieve high speed, low power, wide locking range and accurate quadrature output phases. The frequency-division criterion is analyzed and agrees well with simulation results. The(More)
— A digital controlled artificial dielectric (DiCAD) differential transmission line is embedded in 90nm CMOS to digitally tune a 58-64GHz DCO. DiCAD varies ε ε ε ε r,eff from 18.8 to 32.5. A shunt open stub DiCAD provides discrete capacitive tuning with 13.1 o S11 phase variation. The core oscillator is an inductively loaded differential, cross-coupled NMOS(More)
—57–65 GHz differential and transformer-coupled power and variable-gain amplifiers using a commercial 90 nm digital CMOS process are presented. On-chip transformers combine bias, stability and input/interstage matching networks to enable compact designs. Balanced transmission lines with artificial dielectric strips provide substrate shielding and increase(More)
— A digitally controlled artificial dielectric (DiCAD) differential transmission line is designed to perform agile linear phase shift over 100 o with thermometer-coded 16step control. It also operates with a 16 gain-step VGA to enable re-configurable and direct-frequency modulation at 60GHz with 256 2 states (1.1 o angular and 0.0007 magnitude resolutions)(More)
— Digital control of the effective dielectric constant of a differential mode transmission line is shown up to 60GHz in standard CMOS technology. The effective dielectric constant is shown to increase from 5 to over 50 for the fixed artificial dielectric case. The digital controlled artificial dielectric transmission line (DiCAD) uses MOS switches to(More)
— A fully differential 60 GHz three-stage transformer-coupled amplifier is designed and implemented in 65 nm digital CMOS process. On-chip transformers which offer DC biasing for individual stages, extra stabilization mechanisms, and simultaneous input/inter-stage/output matching networks are used to facilitate a compact circuit design. With a cascoded(More)
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